The present invention relates to a photodiode array and a method for manufacturing the same. More particularly, it relates to a photodiode array which contributes to a reduction in both chip size and production cost, and to a method for manufacturing such a photodiode array.
Photodiode arrays have hitherto been used in, for example, solid state relays (SSRs). A representative example of such photodiode arrays is of a structure such as shown in FIG. 15, wherein portions of an n-type polysilicon substrate 31 are isolated from each other with a silicon oxide film 32; a p-type impurity diffusion layer 33 is formed in each of the isolated portions and, further, an n.sup.+ -type impurity diffusion layer 34 of high concentration is formed in the surface layer of the diffusion layer 33, so that a multiplicity of pn junctions are arranged in the substrate 31; and these pn junctions are serially connected to each other with a conductive film 36, with appropriate insulation by means of a silicon oxide film 35.
An alternative prior art photodiode array is disclosed in, for example, Japanese Unexamined Patent Publication No. 22487/1991. This photodiode array is of the structure shown in FIG. 16 wherein photodiodes 24 comprising single-crystalline islands isolated from each other with a silicon oxide film 28 are formed in a dielectric-isolation substrate 23, and serially connected to each other with an aluminum wiring 25.
In either prior art array, however, the structure thereof is complicated because the oxide film 32 or 28 for isolation is formed in the semiconductor substrate 31 or 23 and a pn junction is formed in each of the single-crystalline semiconductor islands isolated with the oxide film 32 or 28. This results in a poor yield at the production process and a rise in the price of products.
In an attempt to overcome such problems of the prior art arrays, a photodiode array wherein an impurity-doped semiconductor layer is formed on a semiconductor substrate covered with an insulating film, and impurity-diffusion layers of a conductivity type opposite to that of the semiconductor layer are formed in the semiconductor layer so as to extend down to the insulating film, thereby forming pn junctions arranged laterally (refer to Japanese Patent Application No. 355876/1991) have been formerly proposed.
This photodiode array, shown in FIG. 17, is characterized by comprising a substrate 41, an insulating film 42 formed on the substrate 41, a semiconductor layer 43 doped with an impurity of first conductivity type insulating film 42, second-impurity diffusion layers 44 of a polarity opposite to that of the semiconductor layer 43 which are formed in the semiconductor layer 43 so as to provide a plurality of pn junctions arranged laterally, and high-concentration diffusion layers 45 of the same polarity with the semiconductor layer 43 which are respectively formed for the pn junctions defined by the layers 43 and 44 and which are situated in the surface layer opposite to the insulating film, whereby the pn junctions arranged laterally are utilized. Since this photodiode array is of a simple structure, it offers an improvement in production yield while realizing a decrease in the price of the products.
The present invention aims to further improve the formerly-proposed photodiode array. It is, therefore, an object of the present invention to provide a photodiode array which enjoy a reduced chip size with reduced cost.